Error Generator: Only Single Bits

[bm_kamath]

Hi Gunnar,

I have couple of questions:

• For some of my experiments , i wanted to destroy the "Single Bit" in the farme without inducing a 6 dominant bits. Is there any way to do that ?
• Also is there any way to selectively make the Bit dominant /recessive ?

Regards
bm_kamath

[G.Bohlen]

Hello,

it is not possible to modify only a single bit.
The module always generates a sequence of 6 dominant bits, starting at the defined bit position. If there were already 5 dominant bits straight bevore the defined position, the CAN nodes will detect a CAN-error after the first of the 6 dominant bits, and there will be a total of 11 dominant bits visible on the bus.

Regards, Gunnar Bohlen

[bm_kamath]

Thanks Gunnar for the clarification ...