Internal clock tolerance

CAN FD Interface for High-Speed USB 2.0
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dlslb
Posts: 1
Joined: Wed 14. May 2025, 18:14

Internal clock tolerance

Post by dlslb » Fri 16. May 2025, 15:48

What is the tolerance and temperature coefficient of the internal clock of the PCAN-USB FD?

My bus has 200ppm oscillators at all nodes. It would be great if the PCAN-USB was as accurate.

M.Maidhof
Support
Support
Posts: 1751
Joined: Wed 22. Sep 2010, 14:00

Re: Internal clock tolerance

Post by M.Maidhof » Mon 19. May 2025, 13:11

Hi,

please provide the serial number (IPEH-XXXXXX yyyyyy) of the used PCAN-USB FD device, to see which hardware revision you are using.

regards

Michael

G.Bohlen
Hardware Development
Hardware Development
Posts: 62
Joined: Wed 22. Sep 2010, 21:38

Re: Internal clock tolerance

Post by G.Bohlen » Tue 20. May 2025, 15:39

Hello,

clock is based on a crystal with a frequency tolerance of 30ppm and a frequency stability of 30ppm within temperature of -40°C to +85°C. Thererfor the input clock can vary by 60ppm. The CAN output clock is created by using several digital dividers that do not change the accuracy.

Regards
Gunnar Bohlen

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